Low RAM CUDA-based Voxel-Driven FDK Integration in CIL

[gfardell]

Description

Implement a voxel-driven FDK (Feldkamp-Davis-Kress) back-projector within CIL to improve integration and reduce peak memory usage. Current implementations via ASTRA and TIGRE require both input and output to reside entirely in RAM, along with additional overhead from data copies.

FDK only requires a single pass over the input data, making it well-suited for chunked IO and streaming.

Goals

• Enable disk-based input/output to reduce memory footprint.
• Enable RAM-based input/output to match current pipelines and simplify testing
• Combined read/process/write speed should be comparable to current solutions
• Integrate with CIL’s recon.fdk module

Pipelines

Pipeline 1 – RAM to Disk
Avoids keeping the full volume in RAM. Most of the write overhead is hidden.

1. Set up DataReader
2. Read full dataset as AcquisitionData
   • Convert data to absorption
   • Estimate centre of rotation
3. Create recon.FDK instance using AcquisitionData
4. Run FDK, specifying output path
   • Writes reconstructed volume as a stack of 32-bit binary slices

Pipeline 2 – Disk to Disk
Avoids keeping both full input and output in RAM. IO overhead is effectively hidden.

1. Create AcquisitionGeometry describing the dataset
2. Create recon.FDK instance using AcquisitionGeometry and input file path
   • Reads a 32-bit binary file containing absorption data as a stack of projections
3. Run FDK, specifying output path
   • Writes reconstructed volume as a stack of 32-bit binary slices

Notes

• Initial implementation will be CUDA-based
• Initially single GPU
• Support for:
  • RAM input/output as AcquisitionData and ImageData
  • File input/output (initially as binary files containing floating point data)