From 76d789f5af723f8fef5f57f66941ee080dd71748 Mon Sep 17 00:00:00 2001 From: Adeeb Shihadeh Date: Sun, 5 Oct 2025 13:36:13 -0700 Subject: [PATCH 1/2] configure prio --- board/drivers/interrupts.h | 27 +++++++++++++++++++++++++ board/drivers/interrupts_declarations.h | 27 ++++++++++++++++++++++++- 2 files changed, 53 insertions(+), 1 deletion(-) diff --git a/board/drivers/interrupts.h b/board/drivers/interrupts.h index 1188a8ec07b..e8ce78218ca 100644 --- a/board/drivers/interrupts.h +++ b/board/drivers/interrupts.h @@ -14,6 +14,9 @@ static uint32_t idle_time = 0U; static uint32_t busy_time = 0U; float interrupt_load = 0.0f; +// Track NVIC priority grouping used for encoding priorities +static uint32_t nvic_priority_grouping = IRQ_PRIORITY_GROUPING_DEFAULT; + void handle_interrupt(IRQn_Type irq_type){ static uint8_t interrupt_depth = 0U; static uint32_t last_time = 0U; @@ -69,13 +72,37 @@ void interrupt_timer_handler(void) { INTERRUPT_TIMER->SR = 0; } +void interrupts_set_priority_grouping(uint32_t grouping) { + // Set NVIC priority grouping (0..7), 0 -> all preempt priority bits + nvic_priority_grouping = grouping; + NVIC_SetPriorityGrouping(nvic_priority_grouping); +} + +void interrupts_set_priority(IRQn_Type irq_type, uint8_t preempt_prio, uint8_t sub_prio) { + if ((uint32_t)irq_type < NUM_INTERRUPTS) { + interrupts[irq_type].preempt_prio = preempt_prio; + interrupts[irq_type].sub_prio = sub_prio; + uint32_t encoded = NVIC_EncodePriority(NVIC_GetPriorityGrouping(), preempt_prio, sub_prio); + NVIC_SetPriority(irq_type, encoded); + } +} + void init_interrupts(bool check_rate_limit){ check_interrupt_rate = check_rate_limit; for(uint16_t i=0U; i all bits are preempt priority +#endif +#ifndef IRQ_DEFAULT_PREEMPT_PRIORITY +#define IRQ_DEFAULT_PREEMPT_PRIORITY (0U) // keep existing behavior: all equal +#endif +#ifndef IRQ_DEFAULT_SUBPRIORITY +#define IRQ_DEFAULT_SUBPRIORITY (0U) +#endif + +// Apply defaults on registration and set NVIC priority accordingly. #define REGISTER_INTERRUPT(irq_num, func_ptr, call_rate_max, rate_fault) \ interrupts[irq_num].irq_type = (irq_num); \ interrupts[irq_num].handler = (func_ptr); \ interrupts[irq_num].call_counter = 0U; \ interrupts[irq_num].call_rate = 0U; \ interrupts[irq_num].max_call_rate = (call_rate_max); \ - interrupts[irq_num].call_rate_fault = (rate_fault); + interrupts[irq_num].call_rate_fault = (rate_fault); \ + interrupts[irq_num].preempt_prio = IRQ_DEFAULT_PREEMPT_PRIORITY; \ + interrupts[irq_num].sub_prio = IRQ_DEFAULT_SUBPRIORITY; \ + interrupts_set_priority((irq_num), IRQ_DEFAULT_PREEMPT_PRIORITY, IRQ_DEFAULT_SUBPRIORITY); extern float interrupt_load; @@ -29,3 +50,7 @@ void handle_interrupt(IRQn_Type irq_type); // Every second void interrupt_timer_handler(void); void init_interrupts(bool check_rate_limit); + +// Priority configuration helpers +void interrupts_set_priority(IRQn_Type irq_type, uint8_t preempt_prio, uint8_t sub_prio); +void interrupts_set_priority_grouping(uint32_t grouping); From 15f129e72f4b17d36bab09eae25314aae34cfb9f Mon Sep 17 00:00:00 2001 From: Adeeb Shihadeh Date: Sun, 5 Oct 2025 13:41:24 -0700 Subject: [PATCH 2/2] raise spi --- board/drivers/interrupts_declarations.h | 18 +++++++----------- board/stm32h7/llspi.h | 6 ++++++ 2 files changed, 13 insertions(+), 11 deletions(-) diff --git a/board/drivers/interrupts_declarations.h b/board/drivers/interrupts_declarations.h index a6fb2faf3ec..d791eaa5cd5 100644 --- a/board/drivers/interrupts_declarations.h +++ b/board/drivers/interrupts_declarations.h @@ -20,17 +20,13 @@ void unused_interrupt_handler(void); extern interrupt interrupts[NUM_INTERRUPTS]; -// Default priority configuration. Changing these does not by itself change NVIC -// behavior until priorities are (re)set, but allows a single place to tune. -#ifndef IRQ_PRIORITY_GROUPING_DEFAULT -#define IRQ_PRIORITY_GROUPING_DEFAULT (0U) // 0 => all bits are preempt priority -#endif -#ifndef IRQ_DEFAULT_PREEMPT_PRIORITY -#define IRQ_DEFAULT_PREEMPT_PRIORITY (0U) // keep existing behavior: all equal -#endif -#ifndef IRQ_DEFAULT_SUBPRIORITY -#define IRQ_DEFAULT_SUBPRIORITY (0U) -#endif +// Default priority configuration (fixed, not overridable) +// - Grouping 0: all available bits used for preempt priority +// - Baseline preempt priority: 2 (SPI/DMA use 0 to preempt) +// - Subpriority: 0 (unused with grouping 0) +#define IRQ_PRIORITY_GROUPING_DEFAULT (0U) +#define IRQ_DEFAULT_PREEMPT_PRIORITY (2U) +#define IRQ_DEFAULT_SUBPRIORITY (0U) // Apply defaults on registration and set NVIC priority accordingly. #define REGISTER_INTERRUPT(irq_num, func_ptr, call_rate_max, rate_fault) \ diff --git a/board/stm32h7/llspi.h b/board/stm32h7/llspi.h index 05f8e22f9a8..678d878db20 100644 --- a/board/stm32h7/llspi.h +++ b/board/stm32h7/llspi.h @@ -84,6 +84,12 @@ void llspi_init(void) { REGISTER_INTERRUPT(DMA2_Stream2_IRQn, DMA2_Stream2_IRQ_Handler, SPI_IRQ_RATE, FAULT_INTERRUPT_RATE_SPI_DMA) REGISTER_INTERRUPT(DMA2_Stream3_IRQn, DMA2_Stream3_IRQ_Handler, SPI_IRQ_RATE, FAULT_INTERRUPT_RATE_SPI_DMA) + // Elevate SPI and its DMA above the baseline so they can preempt others + // Preempt priority 0 (highest), subpriority 0 + interrupts_set_priority(SPI4_IRQn, 0U, 0U); + interrupts_set_priority(DMA2_Stream2_IRQn, 0U, 0U); + interrupts_set_priority(DMA2_Stream3_IRQn, 0U, 0U); + // Setup MOSI DMA register_set(&(DMAMUX1_Channel10->CCR), 83U, 0xFFFFFFFFU); register_set(&(DMA2_Stream2->CR), (DMA_SxCR_MINC | DMA_SxCR_TCIE), 0x1E077EFEU);