jit: Improve MMU efficiency in system simulation

[vacantron]

In the current flow of the JIT compilation, the simulation will be reverted back to the interpreter mode to deal with the translation of the virtual address to the physical address when reaching the memory operation (lw/sw) in the system simulation. This is going to have a significant impact to the performance due to the mode switching.

The one of the possible solutions is to implement the translation lookaside buffer (TLB). However, the situation mentioned above will still happen if the cache misses.

[jserv]

TODO:

• Find an effective way to measure elapsed time when running benchmark programs inside Linux guest.
• Clarify the reasons for slowdown because of JIT compilation.

[vacantron]

In the current flow of the JIT compilation, the simulation will be reverted back to the interpreter mode to deal with the translation of the virtual address to the physical address when reaching the memory operation (lw/sw) in the system simulation.

In #521, we implemented MMU with JIT system simulation by redirecting the current execution flow to jit_mmu_handler() by the jump instruction. In this handler, we translate the virtual address to physical address and return it to the JIT. A MMIO check is also to be done in the meanwhile. The overhead of this check might be the one of the reason that causes the performance drop.

To improve the memory address translation, we could cache the translated virtual address instead of jumping to jit_mmu_handler(). However, we still need to check if it is a MMIO or not first to avoid the unexpected behavior.