Hardware Description Languages
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- constraints Public
Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards
hdl/constraints’s past year of commit activity - bazel_rules_hdl Public
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
hdl/bazel_rules_hdl’s past year of commit activity - conda-eda Public
Conda recipes for FPGA EDA tools for simulation, synthesis, place and route and bitstream generation.
hdl/conda-eda’s past year of commit activity - containers Public
Building and deploying container images for open source electronic design automation (EDA)
hdl/containers’s past year of commit activity - pyHDLParser Public Forked from kevinpt/hdlparse
Simple Python parser for extracting HDL (VHDL or Verilog) documentation
hdl/pyHDLParser’s past year of commit activity - conda-build-prepare Public
hdl/conda-build-prepare’s past year of commit activity - conda-compilers Public
Conda recipes for C cross compilers needed for FPGA development with common processor architectures.
hdl/conda-compilers’s past year of commit activity
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