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@abdattar abdattar commented Dec 7, 2025

The ACPI specification does not require legacy IRQs (x86) to be ActiveLow when EdgeTriggered or vice-versa.

Hence the ASSERT checking for ActiveLow when EdgeTriggered is removed for IRQ macro generation.

The IRQNoFlags macro defaults to EdgeTrigger and ActiveHigh configuration, demonstrating that this combination is valid.

Reference: ACPI Specification 6.5

  • Section 19.6.66: IRQ (Interrupt Resource Descriptor Macro)
  • Section 19.6.67: IRQNoFlags (Interrupt Resource Descriptor Macro)

Description

  • Breaking change?
    • Breaking change - Does this PR cause a break in build or boot behavior?
    • Examples: Does it add a new library class or move a module to a different repo.
  • Impacts security?
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How This Was Tested

Tested on AMD platform.

Integration Instructions

N/A

The ACPI specification does not require legacy IRQs (x86) to be
ActiveLow when EdgeTriggered or vice-versa.

Hence the ASSERT checking for ActiveLow when EdgeTriggered is
removed for IRQ macro generation non-ARM architecture.

The IRQNoFlags macro defaults to EdgeTrigger and ActiveHigh
configuration, demonstrating that this combination is valid.

Reference: ACPI Specification 6.5
- Section 19.6.66: IRQ (Interrupt Resource Descriptor Macro)
- Section 19.6.67: IRQNoFlags (Interrupt Resource Descriptor Macro)

Signed-off-by: Abdul Lateef Attar <[email protected]>
@pierregondois pierregondois added the push Auto push patch series in PR if all checks pass label Dec 11, 2025
@mergify mergify bot added the queued label Dec 11, 2025
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mergify bot commented Dec 11, 2025

Merge Queue Status

✅ The pull request has been merged at 354e5a9

This pull request spent 13 minutes 9 seconds in the queue, including 13 minutes running CI.
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@mergify mergify bot merged commit 14aa197 into tianocore:master Dec 11, 2025
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@mergify mergify bot removed the queued label Dec 11, 2025
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